Power amplifiers (PAs) are used in a wide variety of communications and other electronic applications. A major consideration in the design of power amplifiers is the efficiency thereof. It is generally desirable for linear power amplifiers to amplify radio frequency (RF) signals in a highly efficient manner. High efficiency is generally desirable so as to reduce battery drain in portable equipment, and the amount of power that is dissipated as heat. Linearity is generally desirable so that, for instance, the amplified signal contains no distortions and does not extend into adjacent frequency spectrum where it may cause interference with ongoing communications.
However, there are tradeoffs between maximum efficiency and high linearity. Specifically, efficiency is generally proportional to the input drive level, and high efficiency is usually not attained until an amplifier approaches its maximum output power, at which point the linearity is significantly degraded. Moreover, where the power amplifier is driven by an input signal having varying amplitude, a conventional class AB or B power amplifier, for example, must typically be operated at or near an average power level that is significantly below its saturation level to accommodate the peak input signal swings. As a result, the efficiency suffers.
One power amplifier technique that was developed as an enhanced efficiency amplifier used for amplifying an input signal with significant amplitude modulation is the Doherty PA architecture. The classical Doherty architecture combines two PAs of equal capacity through an impedance-inverter network that includes, for instance, one or more quarter-wavelength transmission lines. The carrier (or main) PA is, typically, biased in Class AB (but may be alternatively biased in Class B), while the peaking (or auxiliary) PA is typically biased in Class C. In operation, only the carrier PA is active when the input signal level is less than a predetermined threshold, for example when the input signal power is less than one fourth of the peak envelope power (PEP) for the Doherty PA. Both the carrier and peaking PAs contribute to output power when the input signal level is equal to or greater than the predetermined threshold.
FIG. 1 illustrates a plot of efficiency versus normalized power output of a classical Doherty PA architecture having a single carrier PA and a single peaking PA of equal capacity. As can be seen from FIG. 1, the Doherty amplifier exhibits an essentially flat efficiency versus power output characteristic over a 6 dB range from Pavg to PEP. This is possible due to the ability of the Doherty amplifier to dynamically adjust its load line in response to the driving signal envelope. However, there are a number of limitations associated with this architecture. For instance, in order to achieve desired linearity, the prior art Doherty PA must be designed to limit operation of its carrier amplifier to a level below saturation. This level usually corresponds to the carrier amplifier's 1 dB compression point, which may be 2 to 3 dB below saturation. Because of this limitation, maximum attainable efficiency is reduced to 80% or less of the efficiency value which is achievable at saturation.
Another limitation of the classical Doherty PA architecture is that above the peaking amplifier cut-in point, the carrier amplifier must simultaneously decrease its gain as its power output level increases. This action compensates for increases in carrier amplifier drive power that continue beyond the cut-in point of the peaking amplifier, and serves to maintain the desired constant voltage swing at the carrier amplifier output. More specifically, the carrier amplifier must be designed such that its gain decreases (by 3 dB) between Pavg (where the peaking amplifier is off) and PEP (where the peaking amplifier is fully on). This is done to fix the voltage swing at the output of the carrier amplifier while its load impedance is modulated by the peaking amplifier. The peaking amplifier drives current into the load, which raises its apparent impedance. However, because of the impedance inversion of the quarter-wavelength line attached to the carrier amplifier's output, the impedance at the carrier amplifier output drops, which occurs simultaneously with an increasing drive to the carrier amplifier. Therefore, without the above-referenced gain decrease, the power delivered by the carrier amplifier would increase by 6 dB at PEP, instead of the desired 3 dB. In such case, the linearity of the overall Doherty PA degrades, resulting in distortion of the amplified signal and spreading of the signal into the adjacent frequency spectrum. This represents one of the most significant design difficulties associated with practical Doherty power amplifier designs.
Yet another limitation of the classical Doherty PA architecture is that although it is effective for applications that have a peak-to-average ratio of about 6 dB (or about 4:1), its effectiveness is limited for applications such as, for instance, OFDM (orthogonal frequency division modulation), 4G cellular, WLAN, etc. that have increasingly higher peak-to-average ratios (e.g. 10–12 dB (or about 10–16:1)). In such applications, the modulated signal would spend considerable time at power levels below the range over which the classical Doherty PA exhibits maximum efficiency, resulting in significant degradations to the DC and RF conversion efficiency. In addition, many systems require additional (and often relatively large) reductions in the average power output during “power control” operations, further degrading the efficiency. Power control methods are commonly utilized to reduce the transmitter output level of portable or mobile units to the lowest level necessary to maintain reliable communications. Such power reductions minimize the level of interference, thereby maximizing the possible number of simultaneous users of the communications system. Unfortunately, the power reduction also causes an efficiency decrease in the power amplifiers used by these units.
An extended Doherty PA architecture may be utilized to more efficiently amplify applications having a higher peak-to-average ratio than 6 dB. One such extended Doherty topology includes additional peaking amplifier stages. FIG. 2 illustrates a plot of efficiency versus normalized power output of a prior art extended Doherty PA architecture having a single carrier amplifier stage and three combined peaking amplifier stages, all of equal capacity. As shown in FIG. 2, this configuration is usable over a 16:1 (12 dB) range of power output levels. However, the tradeoff is that the efficiency curve has a narrow peak in the vicinity of Pavg, and the efficiency dip between Pavg and PEP is very pronounced. This efficiency dip is the result of three peaking amplifier stages (or, alternatively, one peaking amplifier stage which is three times the size of the carrier amplifier stage) just beginning to turn on for drive levels incrementally above Pavg. In this region, current is drawn, but power output contribution from the peaking stage(s) is far below that of the carrier amplifier stage. Thus, efficiency first degrades then improves as the power output increases toward PEP.
In addition, although this extended Doherty topology addresses one limitation of the classical Doherty architecture, i.e., limited effectiveness for higher peak-to-average ratios, this extended Doherty architecture does not address the other two limitations of the classical Doherty architecture described above, i.e., maximum attainable efficiency being no more than 80% and the design difficulty of the carrier amplifier. Nor do other known extended Doherty topologies address these two limitations.
Thus, there exists a need for a power amplifier having high efficiency even when the average power level is backed off substantially from the amplifier's peak power capability and that maintains its efficiency over higher peak-to-average ratios.